TTTC Header Image
TTTC's Electronic Broadcasting Service

IEEE Transactions on VLSI Systems
Special Section on

Autonomous Silicon Validation and Testing of
Microprocessors and Microprocessor-based Systems

http://tvlsi-ieee.manuscriptcentral.com/

CALL FOR PAPERS

Overview -- Submissions

Overview

Microprocessors have always been at the leading-edge of integrated circuit (IC) technology in terms of delivered performance and functionality. Continued scaling of MOS devices that constitute the manufacturing fabric has allowed both general purpose processors and embedded processors, typically found in Systems-on-a-Chip (SoC), to grow in functionality, performance and complexity. Manufactured circuits testing technology, that goes hand-in-hand with the design and manufacturing technologies, runs the entire gamut of testing practices and fault models. With explosive growth in transistor count and burgeoning growth in number of failure mechanisms, the tasks of microprocessors and microprocessor-based ICs testing have become more challenging.

Effective methodologies for silicon validation and testing from the first stages of silicon prototyping through volume production manufacturing testing and subsequent field operation can benefit from the uniqueness of locally available microprocessor hardware that is typically not found in other designs. Moreover, a processor has exceptional access to every other component of a complex design. The processor’s unique programmability can be used to support the validation and testing of itself as well as of all the surrounding components as they lend the system with a powerful processing engine that can efficiently handle test application and test control algorithms.

This special section aims to collect recent advances, methodologies and best practices in the area of autonomous and semi-autonomous validation and testing of microprocessors and microprocessor based systems. Topics of interest referring to microprocessors and processor-based SoCs include (but are not limited to) the following:

  • First silicon validation
  • Silicon debug
  • Fault and defect diagnosis
  • Manufacturing/volume testing
  • Embedded test and self-test
  • Speed, power, temperature and voltage characterization
  • Failure analysis and fault modeling
  • On-line testing, field testing, and fault tolerance techniques
  • Multiprocessor systems
  • Power-aware testing
  • Clock control, power and temperature management
  • Regular array testing and repair methods, including memories
Submissions
top

Authors are encouraged to submit high-quality research contributions that preferably will not require major revisions. The Guest Editors for the Special Section are as follows:

Dimitris Gizopoulos
University of Piraeus
Department of Informatics
80 Karaoli & Dimitriou Street
Piraeus, 18534, Greece
dgizop@unipi.gr

Robert C. Aitken
ARM Physical IP
141 Caspian Ct.
Sunnyvale, CA 94089, USA
raitken@arm.com

Sandip Kundu
University of Massachusetts, Amherst
Electrical and Computer Engineering Department
151 Holdsworth Way
Amherst, MA 01003-9284, USA
kundu@ecs.umass.edu

All manuscripts are subject to the standard Transactions on VLSI review process. Prospective authors should submit their manuscripts electronically to the TVLSI Web site http://tvlsi-ieee.manuscriptcentral.com/ and highlight in the “Notes to EIC” that the manuscript is being submitted to the special section on “Autonomous Silicon Validation and Testing of Microprocessors and Microprocessor-based Systems”. Please also send an email to the Guest Editors notifying them of your submission.

Instructions on how to submit a paper can be found at http://tvlsi-ieee.manuscriptcentral.com/ and authors can contact Michael Pham at mpham@csee.usf.edu for further assistance.

  • Papers submission deadline: July 31, 2006
  • Authors initial notification: October 5, 2006
  • Revised manuscripts due: November 5, 2006
  • Final notifications: December 5, 2006
  • Final manuscripts due: December 20, 2006
  • Publication date: April 2007
For more information, visit us on the web at: http://tvlsi-ieee.manuscriptcentral.com/

IEEE Computer Society– Test Technology Technical Council

TTTC CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

SENIOR PAST CHAIR
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com


TTTC 2ND VICE CHAIR
Joan FIGUERAS
Universitat Politècnica de Catalunya - Spain
Tel. +34-93-401-6603
E-mail figueras@eel.upc.es

FINANCE
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

DESIGN & TEST MAGAZINE
Tim CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG

Lucent Technologies
- USA
Tel. +1-732-949-5539
E-mail chenhuan@lucent.com

TECHNICAL ACTIVITIES
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

ASIA & SOUTH PACIFIC
Hideo FUJIWARA
Nara Institute of Science and Technology - Japan
Tel. +81-74-372-5220
E-mail fujiwara@is.aist-nara.ac.jp

LATIN AMERICA
Marcelo LUBASZEWSKI
Federal University of Rio Grande do Sul - Brazil
Tel. +34-93-401-6603
E-mail luba@vortex.ufrgs.br

NORTH AMERICA
William R. MANN
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

 

PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 1ST VICE CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

INTERNATIONAL TEST CONFERENCE
Scott DAVIDSON
Sun Microsystems
- USA
Tel. +1-650-786-7256
E-mail scott.davidson@eng.sun.com

TEST WEEK COORDINATION
Yervant ZORIAN
Virage Logic - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
- USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
Michael NICOLAIDIS
iRoC Technologies - France
Tel. +33-4-381-20763
E-mail michael.nicolaidis@iroctech.com

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it


This message contains public information only. You are invited to copy and distribute it further.

For more information contact the TTTC office or visit http://tab.computer.org/tttc/

To remove your name from this mailing list, please email unsubscribetttc@cemamerica.com or login to the TTTC Database and uncheck the EBS (Electronic Broadcast Service) box, which can modified by selecting "Edit" next to "My Subscriptions".